Conference paper
5.8 Gb/s 16:1 multiplexer and 1:16 demultiplexer using 1.2 μm BiCMOS
In
Proceedings of the Ieee International Symposium on Circuits and Systems
—
1994, Volume 4, pp. 43-46
Abstract
High speed time-division multiplexers and demultiplexers are important components of modern optical communication systems. They are needed to parallelize the data to allow most of the system to operate at much lower speeds. This paper describes a 16:1 multiplexer and a 1:16 demultiplexer implemented on one IC in a 1.2 μm BiCMOS process.
The IC combines fast ECL circuits with CMOS circuits, demonstrating that by utilizing the combination of bipolar and MOS transistors, a VLSI circuit with very high speed interface is feasible
| Language: | English |
|---|---|
| Publisher: | IEEE |
| Year: | 1994 |
| Pages: | 43-46 |
| Proceedings: | 1994 IEEE International Symposium on Circuits and Systems |
| ISBN: | 078031915X , 078031915x and 9780780319158 |
| Types: | Conference paper |
| DOI: | 10.1109/ISCAS.1994.409192 |
