Conference paper
InterNoC: Unified Deterministic Communication For Distributed NoC-based Many-Core
Network-on-Chip is a popular paradigm for scalable many-core communication. There is a trend in modern system-on-chip to integrate more functionality. This combined with recent research for network-on-chip in the aerospace industry, gives room for design space exploration in new architectural paradigms for distributed and real-time many-core communication.
In this paper, we present InterNoC, a deterministic communication scheme for distributed network-on-chip many-core that allows for unified IP-based timetriggered communication. It is hypothesized that such an architecture will efficiently minimize communication complexity in distributed many-core systems as well as provide hard-bounded endto-end latency guarantees.
We extend the real-time multi-core platform T-CREST by introducing a time-triggered NoC-based switching mechanism combined with a NoC packet to Ethernet frame traffic controller. The proposed architecture will be evaluated in an experimental InterNoC network that implements a 36-core real-time system distributed over four FPGA devices.
Language: | English |
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Year: | 2019 |
Pages: | 29-32 |
Proceedings: | 13th Junior Researcher Workshop on Real-Time Computing |
Types: | Conference paper |
ORCIDs: | Kyriakakis, Eleftherios , Sparsø, Jens and Schoeberl, Martin |