Conference paper
Phase noise analysis and design of a 3-GHz bipolar differential colpitts VCO
This paper presents a low-phase-noise differential bipolar Colpitts VCO, implemented in a 0.35/spl mu/m BiCMOS process. A time-variant phase noise analysis yields closed- form symbolic expressions for the dominant noise sources in the 1/f/sup 2/ phase-noise region. Measurements show a phase noise of -123 dBc/Hz at 1MHz offset from a 2.8-3.1 GHz carrier, for a figure-of-merit of 183 dBc/Hz.
A very good agreement between the derived theoretical formulas, spectreRF simulations, and measurements is observed.
| Language: | English |
|---|---|
| Year: | 2005 |
| Pages: | 391-394 |
| Proceedings: | 31st European Solid-State Circuits Conference |
| Journal subtitle: | Esscirc 2005 |
| ISBN: | 0780392051 and 9780780392052 |
| Types: | Conference paper |
| DOI: | 10.1109/ESSCIR.2005.1541642 |
0.35 micron 1 MHz 2.8 to 3.1 GHz BiCMOS integrated circuits BiCMOS process Chromium Inductors Noise generators Noise measurement Phase measurement Phase noise Radio frequency Topology Voltage Voltage-controlled oscillators bipolar differential colpitts VCO bipolar integrated circuits dominant noise sources integrated circuit noise microwave oscillators phase-noise region random noise spectreRF simulations time-variant phase noise analysis voltage controlled oscillator voltage-controlled oscillators
