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Conference paper

Analysis of the effects of time delay in clock recovery circuits based on Phase-locked loops

In Proceedings of Ieee Laser and Electro-optics Society Annual Meeting — 2004, Volume 1, pp. 316-317
From

Systems, Department of Photonics Engineering, Technical University of Denmark1

Department of Photonics Engineering, Technical University of Denmark2

Optoelectronics, Department of Photonics Engineering, Technical University of Denmark3

Influence of time delay in a balanced optical phase-locked loops (OPLL) with a proportional integrator (Pl) filter is investigated using a delayed differential equation (DDE) is investigated. The limitations, which a time delay imposes on the Pl filter bandwidth, at increasing values of loop gain, are investigated by numerical simulations.

Furthermore, simple expressions governing the stability properties of the loop, in the presence of time delay, are derived. For this purpose, three standard loop filters are considered: a Pl filter, a low pass (LP) filter and an active lag (AL) filter. The derived expressions are used to perform an optimisation in terms of the selected loop filters.

Language: English
Publisher: IEEE
Year: 2004
Pages: 316-317
Proceedings: 17th Annual Meeting of the IEEE Lasers and Electro-Optics Society 2004
Journal subtitle: Leos 2004
ISBN: 0780385578 and 9780780385573
Types: Conference paper
DOI: 10.1109/LEOS.2004.1363238
ORCIDs: Zibar, Darko , Oxenløwe, Leif Katsuo , Clausen, Anders , Mørk, Jesper and Jeppesen, Palle

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