Journal article
A digitally controlled 2.4-GHz oscillator in 65-nm CMOS
This article presents a 2.4-GHz digitally controlled oscillator (DCO) for the ISM band. The circuit is designed using a 65-nm CMOS technology with an operating voltage of 1.2 V. The DCO comprises an LC oscillator core and the digital interface logic. The measured total frequency range is from 2.26 to 3.04 GHz.
Its frequency quantization step is approximately 20 kHz, and using a digital ΣΔ-modulator (SDM), its effective frequency resolution is better than 1 kHz. Current consumption of the oscillator core is tunable through a 6-bit digital word. The measured phase noise is −122 dBc/Hz at 1-MHz offset frequency with 4.8-mA current consumption.
Language: | English |
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Publisher: | Springer US |
Year: | 2008 |
Pages: | 35-42 |
Journal subtitle: | An International Journal |
ISSN: | 15731979 and 09251030 |
Types: | Journal article |
DOI: | 10.1007/s10470-008-9178-5 |