Conference paper
IR-Drop Reduction in Sub-VT Circuits by De-synchronization
Lund University1
Department of Informatics and Mathematical Modeling, Technical University of Denmark2
Computer Science and Engineering, Department of Informatics and Mathematical Modeling, Technical University of Denmark3
Embedded Systems Engineering, Department of Informatics and Mathematical Modeling, Technical University of Denmark4
This paper proposes IR-drop reduction of sub-VT circuits by de-synchronization. The de-synchronization concept is briefly demonstrated and analyzed by a case study. Extensive IR-drop analysis’ of various technology options of a 65nm CMOS family demonstrate how the noise margins are reduced due to switching noise on the supply rails.
It is shown that a desynchronized implementation reduces severe voltage drops on the supply rails by approximately 50 %, compared to a clocked design.
| Language: | English |
|---|---|
| Publisher: | IEEE |
| Year: | 2012 |
| Proceedings: | 2012 IEEE Subthreshold Microelectronics Conference |
| ISBN: | 1467315869 and 9781467315869 |
| Types: | Conference paper |
| DOI: | 10.1109/SubVT.2012.6404303 |
| ORCIDs: | Sparsø, Jens |
