Chemical Vapour Deposition of Large Area Graphene

Chemical Vapor Deposition (CVD) is a viable technique for fabrication of large areas of graphene. CVD fabrication is the most prominent and common way of fabricating graphene in industry. In this thesis I have attempted to optimize a growth recipe and catalyst layer for CVD fabrication of uniform, single layer, and high carrier mobility large area graphene.

The main goals of this work are; (1) explore the graphene growth mechanics in a low pressure cold-wall CVD system on a copper substrate, and (2) optimize the process of growing high quality graphene in terms of carrier mobility, and crystal structure. Optimization of a process for graphene growth on commercially available copper foil is limited by the number of aluminium oxide particles on the surface of the catalyst.

By replacing the copper foil with a thin deposited copper film on a SiO2/Si or c-plane sapphire wafer the particles can be eliminated. Further opportunities arise when exchanging the copper foil for copper thin film on a wafer e.g. better integration with current cleanroom processing of devices and better control over the copper crystallinity.

Typical strategies for controlling the temperature during CVD fabrication of graphene are proportional, integral, and derivative (PID) controllers. The PID controller in a CVD system works off feedback temperatures from a thermocouple. The thermocouples used in this work suffer from degradation at the temperatures and the hydrogen gasses needed for high quality graphene growth.

The degradation of thermocouples leads to large variations in the grown graphene. This was solved by controlling the temperature through applying a set power to the heat source, resulting in a more stable temperature from process to process. Micro Raman spectroscopy is used to characterize the structural quality of the grown graphene on the copper surface as well as after a transfer process to a SiO2 substrate.

Raman mapping is especially suited for uniformity characterization on a scale of a few to hundreds of microns. In this work the ratios of the 2D- and G-peak, and the ratio of the D- and the G peak are used as measures of crystalline quality of the CVD grown graphene. I have also used spatially resolved micro Raman spectroscopy to map the full width at half maximum (FWHM) of the graphene G-band and the 2D and G peak positions, for as-grown graphene on copper catalyst layers, for transferred CVD graphene and for micro-mechanically exfoliated graphene.

This was done to characterize the effects of a transfer process on the graphene properties. The FWHM(G) to indicate the doping level of graphene, and the ratio of the shifts in the 2D and G bands as an indicator of strain. The transfer process introduces an isotropic, spatially uniform, compressive strain in graphene, and increases the carrier concentration.

Copper foil was found to exhibit a polycrystalline surface with a predominantly Cu(001) orientation, through electron backscatter diffraction mapping. Copper thin film deposited on a SiO2/Si wafer display a polycrystalline nature with the Cu(111) orientation dominating, when the crystals increase in size.

Copper thin film sputtered on a c-plane sapphire wafer shows almost single crystal formation of Cu(111) across a 4 inch wafer. The polycrystalline nature of a thin copper film on a SiO2/Si wafer was investigated through annealing. A variation in the annealing temperature was found to have a significant effect on the crystal size, while the annealing time was found to have little effect on the crystal sizes.

Electronic hall-bar devices were fabricated from CVD graphene grown on copper foil, copper on SiO2/Si wafers, and copper on sapphire wafers. Preliminary results show the highest carrier mobility was achieved from graphene grown on copper on sapphire, while graphene grown on copper foil showed the lowest carrier mobility.