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Conference paper

Synthesis of Fault-Tolerant Schedules with Transparency/Performance Trade-offs for Distributed Embedded Systems

In Design Automation and Test in Europe Conference — 2006, Volume 1, pp. 1-6
From

Linköping University1

Embedded Systems Engineering, Department of Informatics and Mathematical Modeling, Technical University of Denmark2

Department of Informatics and Mathematical Modeling, Technical University of Denmark3

In this paper we present an approach to the scheduling of fault-tolerant embedded systems for safety-critical applications. Processes and messages are statically scheduled, and we use process re-execution for recovering from multiple transient faults. If process recovery is performed such that the operation of other processes is not affected, we call it transparent recovery.

Although transparent recovery has the advantages of fault containment, improved debugability and less memory needed to store the fault-tolerant schedules, it will introduce delays that can violate the timing constraints of the application. We propose a novel algorithm for the synthesis of fault-tolerant schedules that can handle the transparency/performance trade-offs imposed by the designer, and makes use of the fault-occurrence information to reduce the overhead due to fault tolerance.

We model the application as a conditional process graph, where the fault occurrence information is represented as conditional edges and the transparent recovery is captured using synchronization nodes.

Language: English
Year: 2006
Pages: 1-6
Proceedings: 2006 Conference on Design, Automation and Test in Europe
ISBN: 3981080114 and 9783981080117
Types: Conference paper
DOI: 10.1109/DATE.2006.244067
ORCIDs: Pop, Paul

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