Low Power/Low Voltage Interface Circuitry for Capacitive Sensors

This thesis focuses mainly on low power/low voltage interface circuits, implemented in CMOS, for capacitive sensors. A brief discussion of demands and possibilities for analog signal processing in the future is presented. Techniques for low power design is presented. This is done by analyzing power consumption of different amplifier topologies.

Next, low power features of different amplifier types are analyzed on transistor level. A brief comparison of SI circuits for low power applications vs. SC circuits is presented. Methodologies for low voltage design is presented. This is followed by a collection of time continuous and time discrete (switched) analog signal processing circuitry.

Both the authors own designs and others are presented. The theory of higher order Sigma-Delta modulators is presented. Design procedures are given. And it is shown how a Sigma-Delta modulator can be optimized for a low power consumption. It is shown that the Sigma-Delta modulator is advantageous when embedded in a feedback loop with a mechanical sensor.

Here a micro mechanical capacitive microphone. Feedback and detection circuitry for a capacitive microphone is presented. Practical implementations of low power/low voltage interface circuitry is presented. It is demonstrated that an amplifier optimized for a capacitive microphone implemented in a standard 0.7 micron CMOS technology competes well with a traditional JFET amplifier.

Furthermore a low power/low voltage 3rd order Sigma-Delta modulator is presented. The Sigma-Delta is implemented in a standard 0.7 micron CMOS technology. The Sigma-Delta modulator was intended to be used in a feedback loop with a capacitive microphone.