Conference paper
Theoretical and experimental investigation of a balanced phase-locked loop based clock recovery at a bit rate of 160 Gb/s
This paper describes a mathematical model of a balanced opto-electronic phase-locked loop (OPLL), which is required to be very fast for some network applications. OPLL is investigated in terms of clock pulse width, loop filter gain and residuals of the balancing DC level. Based on the guidelines from the theoretical evaluations, a very simple experimental demonstration including a single electroabsorption modulator as phase comparator is constructed.
| Language: | English |
|---|---|
| Publisher: | IEEE |
| Year: | 2003 |
| Pages: | 388,389 |
| Proceedings: | 16th Annual Meeting of the IEEE Lasers and Electro-Optics Society |
| ISBN: | 0780378881 and 9780780378889 |
| ISSN: | 10928081 |
| Types: | Conference paper |
| DOI: | 10.1109/LEOS.2003.1251827 |
| ORCIDs: | Zibar, Darko , Oxenløwe, Leif Katsuo , Clausen, Anders and Mørk, Jesper |
160 Gbit/s Bit rate Chromium Clocks DC level residuals Frequency High speed optical techniques Nonlinear optics Optical feedback Optical filters Optical mixing Phase locked loops balanced phase-locked loop clock pulse width clock recovery electro-optical modulation electroabsorption electroabsorption modulator high-speed optical techniques loop filter gain optical phase locked loops optoelectronic phase-locked loop phase comparator synchronisation time division multiplexing
