Journal article
T-CREST: Time-predictable multi-core architecture for embedded systems
Department of Applied Mathematics and Computer Science, Technical University of Denmark1
GMV S.A.2
Embedded Systems Engineering, Department of Applied Mathematics and Computer Science, Technical University of Denmark3
Czech Technical University in Prague4
University of York5
Intecs S.p.A.6
Eindhoven University of Technology7
The Open Group8
AbsInt Angewandte Informatik GmbH9
Vienna University of Technology10
...and 0 moreReal-time systems need time-predictable platforms to allow static analysis of the worst-case execution time (WCET). Standard multi-core processors are optimized for the average case and are hardly analyzable. Within the T-CREST project we propose novel solutions for time-predictable multi-core architectures that are optimized for the WCET instead of the average-case execution time.
The resulting time-predictable resources (processors, interconnect, memory arbiter, and memory controller) and tools (compiler, WCET analysis) are designed to ease WCET analysis and to optimize WCET performance. Compared to other processors the WCET performance is outstanding.The T-CREST platform is evaluated with two industrial use cases.
An application from the avionic domain demonstrates that tasks executing on different cores do not interfere with respect to their WCET. A signal processing application from the railway domain shows that the WCET can be reduced for computation-intensive tasks when distributing the tasks on several cores and using the network-on-chip for communication.
With three cores the WCET is improved by a factor of 1.8 and with 15 cores by a factor of 5.7.The T-CREST project is the result of a collaborative research and development project executed by eight partners from academia and industry. The European Commission funded T-CREST.
Language: | English |
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Publisher: | Elsevier BV |
Year: | 2015 |
Pages: | 449-471 |
ISSN: | 18736165 and 13837621 |
Types: | Journal article |
DOI: | 10.1016/j.sysarc.2015.04.002 |
ORCIDs: | Schoeberl, Martin and Sparsø, Jens |
Collaborative research Computation-intensive task Computer architecture Distributed computer systems Embedded systems European Commission Industrial use case Interactive computer systems Memory architecture Microprocessor chips Multi-core processor Multicore architectures Network architecture Network-on-chip Program compilers Real time systems Real-time systems Signal processing Signal processing applications Static analysis Time-predictable computer architecture VLSI circuits Worst-case execution time