Conference paper
Combined Radix-10 and Radix-16 Division Unit
In this work we extend a previously proposed digit-recurrence radix-10 division unit to be able to perform also radix-16 division. The extension is simplified by the fact that in the radix-10 implementation the quotient digit is decomposed into two parts and that this decomposition is also appropriate for the radix-16 case.
Moreover, to reduce the latency in the radix-10 the most-significant portion of the datapath, including the selection function, has been implemented in radix-2, so that the modifications of that part to include radix-16 consists mainly in combining the two modules to obtain the selection constants. The rest of the modifications relate to the generation of multiples, to the carry-save adder, to the carry-propagate adder, and to the on-the-fly conversion and rounding.
The implementation results show that the delay of an iteration is similar to that of the radix-10 case and that the area is about thirty percent larger.
| Language: | English |
|---|---|
| Year: | 2007 |
| Pages: | 967-971 |
| Proceedings: | 41st Asilomar Conference on Signals, Systems, and Computers |
| ISBN: | 1424421098 , 1424421101 , 9781424421091 and 9781424421107 |
| ISSN: | 10586393 and 25762303 |
| Types: | Conference paper |
| DOI: | 10.1109/ACSSC.2007.4487363 |
| ORCIDs: | Nannarelli, Alberto |
