Conference paper
A New Approach to Optimal Cell Synthesis
A set of algorithms is presented for optimal layout generation of CMOS complex gates. The algorithms are able to handle global physical constraints, such as pin placement, and to capture timing aspects. Results show that this novel approach provides better solutions in area and speed compared t other methods.
The algorithms have been implemented in a cell compiler (CELLO) working in an experimental silicon compiler environment.
Language: | English |
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Publisher: | IEEE |
Year: | 1989 |
Pages: | 336,337,338,339 |
Proceedings: | International Conference on Computer-Aided Design |
ISBN: | 0818619864 and 9780818619861 |
Types: | Conference paper |
DOI: | 10.1109/ICCAD.1989.76965 |
ORCIDs: | Madsen, Jan |
Algorithm design and analysis CELLO CMOS complex gates CMOS integrated circuits Circuit optimization Design optimization Propagation delay Routing Silicon compiler Timing cell compiler circuit layout CAD global physical constraints logic CAD optimal cell synthesis optimal layout generation pin placement silicon compiler environment timing aspects