Conference paper
A 2.5 gb/s GaAs ATM Mux Demux ASIC
This paper describes the design and implementation of a high speed GaAs ATM Mux Demur ASIC (AMDA) which is the key element in a high speed ATM Add-Drop unit. This unit is used in a new distributed ATM multiplexing-demultiplexing architecture for broadband switching systems. The Add-Drop unit provides a cell based interface between networks/systems operating at different data rates, the high speed interface being 2.5 Gb/s and the low speed interface being 155/622 Mb/s.
Self-timed FIFOs are used for handling the speed gaps between domains operating at different clock rates, and a Self-Timed At Receiver's Input (STARI) interface is used at all high speed chip-to-chip links to eliminate timing skews The AMDA demonstrated operation above 4 Gb/s (500 MHz clock frequency) with an associated power dissipation of 5 W
| Language: | English |
|---|---|
| Publisher: | IEEE |
| Year: | 1995 |
| Pages: | 43-46 |
| Proceedings: | 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium |
| ISBN: | 078032966x , 9780780329669 and 078032966X |
| Types: | Conference paper |
| DOI: | 10.1109/GAAS.1995.528957 |
2.5 to 4 Gbit/s 500 MHz ATM mux/demux ASIC Application specific integrated circuits Appropriate technology Asynchronous transfer mode B-ISDN Bandwidth CMOS technology Clocks Electromagnetics GaAs Gallium arsenide III-V semiconductors MESFET integrated circuits Media Access Protocol STARI interface Switches application specific integrated circuits asynchronous transfer mode broadband switching systems cell based interface demultiplexing equipment direct coupled FET logic distributed multiplexing-demultiplexing architecture field effect digital integrated circuits field effect logic circuits gallium arsenide high speed ATM add-drop unit high speed interface low speed interface multiplexing equipment self timed FIFOs self timed at receiver input
