Conference paper
From Chisel to Chips with Open-Source Tools
Embedded Systems Engineering, Department of Applied Mathematics and Computer Science, Technical University of Denmark1
Department of Applied Mathematics and Computer Science, Technical University of Denmark2
Nano Bio Integrated Systems, Section for Microbial and Chemical Ecology, Department of Biotechnology and Biomedicine, Technical University of Denmark3
Section for Microbial and Chemical Ecology, Department of Biotechnology and Biomedicine, Technical University of Denmark4
Chisel and Verilator provide an open-source stack for digital design. For ASIC synthesis, we have open-source tools like OpenROAD, Yosys, and Magic. OpenROAD is a project to deliver an end-to-end silicon compiler in open source. The aim is to “democratize hardware design” by providing an automated layout generation flow from a design in RTL to GDS files used to produce silicon.
Google and Efabless offer free production of chips in a multi-project wafer if the project is available in open source. In this paper, we report our experience in using the open-source tool flow from Chisel to chips with two designs: a small processor using only on-chip resources and a RISC-style processor, called Patmos, with extra external main memory.
We have successfully taped out the Patmos processor for the multiproject waver MPW7 from Efabless.
| Language: | English |
|---|---|
| Year: | 2022 |
| Proceedings: | 2022 Workshop on Open-Source EDA Technology |
| Types: | Conference paper |
| ORCIDs: | Schoeberl, Martin and Pezzarossa, Luca |
