Book chapter · Conference paper
Design Principles for Synthesizable Processor Cores
As FPGAs get more competitive, synthesizable processor cores become an attractive choice for embedded computing. Currently popular commercial processor cores do not fully exploit current FPGA architectures. In this paper, we propose general design principles to increase instruction throughput on FPGA-based processor cores: first, superpipelining enables higher-frequency system clocks, and second, predicated instructions circumvent costly pipeline stalls due to branches.
To evaluate their effects, we develop Tinuso, a processor architecture optimized for FPGA implementation. We demonstrate through the use of micro-benchmarks that our principles guide the design of a processor core that improves performance by an average of 38% over a similar Xilinx MicroBlaze configuration.
Language: | English |
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Publisher: | Springer |
Year: | 2012 |
Pages: | 111-122 |
Proceedings: | ARCS 2012 - Architecture of Computing Systems |
Series: | Lecture Notes in Computer Science |
Journal subtitle: | 25th International Conference Munich, Germany, February 28 – March 2, 2012 Proceedings |
ISBN: | 364228292X , 364228292x , 3642282938 , 9783642282928 and 9783642282935 |
ISSN: | 16113349 and 03029743 |
Types: | Book chapter and Conference paper |
DOI: | 10.1007/978-3-642-28293-5_10 |
ORCIDs: | Karlsson, Sven |