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Journal article

An architecture for fault tolerant controllers

From

Automation, Department of Electrical Engineering, Technical University of Denmark1

Department of Electrical Engineering, Technical University of Denmark2

A general architecture for fault tolerant control is proposed. The architecture is based on the (primary) YJBK parameterization of all stabilizing compensators and uses the dual YJBK parameterization to quantify the performance of the fault tolerant system. The approach suggested can be applied for additive faults, parametric faults, and for system structural changes.

The modeling for each of these fault classes is described. The method allows to design for passive as well as for active fault handling. Also, the related design method can be fitted either to guarantee stability or to achieve graceful degradation in the sense of guaranteed degraded performance. A number of fault diagnosis problems, fault tolerant control problems, and feedback control with fault rejection problems are formulated/considered, mainly from a fault modeling point of view.

The method is illustrated on a servo example including an additive fault and a parametric fault.

Language: English
Year: 2005
Pages: 1091-1110
ISSN: 13665820 and 00207179
Types: Journal article
DOI: 10.1080/00207170500202249
ORCIDs: Niemann, Hans Henrik

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