Conference paper
A Behavioral Synthesis Frontend to the Haste/TiDE Design Flow
This paper presents a complete design tool which performs automatic behavioral synthesis of asynchronous circuits (resource sharing, scheduling and binding). The tool targets a traditional control-datapath-style template architecture. Within the limitations set by this template architecture it is possible to optimize for area (which is our main focus) or for speed.
This is done by simply using different cost functions. Input to the tool is a behavioral description in the Haste language, and output from the tool is a Haste program escribing the synthesized implementation consisting of a datapath and a controller. The tool may be seen as an add-on to the Haste/TiDE tool flow, and it can be used to automatically optimize parts of a design and to quickly xplore alternative optimizations.
The paper outlines the design flow, explains key elements of the design tool, and presents a number of benchmark results.
Language: | English |
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Publisher: | IEEE Computer Society Press |
Year: | 2009 |
Pages: | 185-194 |
Proceedings: | 2009 15th IEEE Symposium on Asynchronous Circuits and Systems |
ISBN: | 0769536166 , 1424439337 , 1509073485 , 9780769536163 , 9781424439331 and 9781509073481 |
ISSN: | 15228681 |
Types: | Conference paper |
DOI: | 10.1109/ASYNC.2009.10 |
ORCIDs: | Sparsø, Jens |
Asynchronous circuits Automatic control Automatic generation control Circuit synthesis Cost function Design optimization Haste language Informatics Mathematical model Resource management Tides asynchronous circuits automatic behavioral synthesis behavioral synthesis behavioral synthesis frontend clockless circuits control data flow graph control-datapath-style template architecture haste-TiDE design flow high level synthesis network synthesis resource binding resource scheduling resource sharing syntax directed translation.