Book chapter · Conference paper
Leros: The return of the accumulator machine
In
Lecture Notes in Computer Science
—
2019, Volume 11479, pp. 115-127
Abstract
An accumulator instruction set architecture is simpler than an instruction set of a (reduced instruction set computer) RISC architecture. Therefore, an accumulator instruction set that does within one instruction less than a typical RISC instruction is probably more “reduced” than a standard load/store register based RISC architecture.
This paper presents Leros, an accumulator machine and its supporting C compiler. The hypothesis of the Leros instruction set architecture is that it can deliver the same performance as a RISC pipeline, but consumes less hardware and therefore also less power.
| Language: | English |
|---|---|
| Publisher: | Springer |
| Year: | 2019 |
| Pages: | 115-127 |
| Proceedings: | 32nd International Conference on Architecture of Computing Systems |
| Series: | Lecture Notes in Computer Science (including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
| Journal subtitle: | 32nd International Conference, Copenhagen, Denmark, May 20–23, 2019, Proceedings |
| ISBN: | 3030186555 , 3030186563 , 9783030186555 and 9783030186562 |
| ISSN: | 16113349 and 03029743 |
| Types: | Book chapter and Conference paper |
| DOI: | 10.1007/978-3-030-18656-2_9 |
| ORCIDs: | Schoeberl, Martin |
Keywords
