Conference paper
Easy simulation and design of on-chip inductors in standard CMOS processes
This paper presents an approach to CMOS inductor modelling, that allow easy simulation in SPICE-like simulators. A number of test results are presented concerning optimal center hole, inductor area, wire spacing and self-inductance. Finally a comprehensive design guide is provided on how to design close-to-optimal inductors without the use of electromagnetic simulators
Language: | English |
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Publisher: | IEEE |
Year: | 1998 |
Pages: | 360-364 |
Proceedings: | 1998 IEEE International Symposium on Circuits and Systems |
ISBN: | 0780344553 and 9780780344556 |
Types: | Conference paper |
DOI: | 10.1109/ISCAS.1998.698855 |