Conference paper
A 0.2V, 7.5 μW, 20 kHz ΣΔ modulator with 69 dB SNR in 90 nm CMOS
This paper presents a frequency-to-digital SigmaDelta modulator designed in a digital 90nm CMOS process, operating with a supply voltage of 0.2 V. For a 7.5 muW power consumption, the SNR is 68.9 dB and the SNDR is 60.3 dB over a 20Hz-20kHz bandwidth. This work shows that the SNR/SNDR performance of this kind of SigmaDelta converter can be adjusted over a wide range, while maintaining a state-of-the-art flgure-of-merit of 82 fJ/conversion.
| Language: | English |
|---|---|
| Publisher: | IEEE |
| Year: | 2007 |
| Pages: | 206-209 |
| Proceedings: | 33rd European Solid-State Circuits Conference |
| ISBN: | 1424411254 and 9781424411252 |
| ISSN: | 19308833 and 26431319 |
| Types: | Conference paper |
| DOI: | 10.1109/ESSCIRC.2007.4430281 |
CMOS integrated circuits CMOS process Chirp modulation Digital modulation Energy consumption Feedback Frequency modulation Quantization Threshold voltage Topology Voltage-controlled oscillators bandwidth 20 Hz to 20 kHz frequency-to-digital sigma-delta modulators power 7.5 muW sigma-delta modulation size 90 nm voltage 0.2 V voltage-controlled oscillators
