Compiling graphical real-time specifications into silicon

The basic algorithms underlying an automatic hardware synthesis environment using fully formal graphical requirements specifications as source language are outlined. The source language is real-time symbolic timing diagrams [FeyerabendJosko97], which are a metric-time temporal logic such that hard real-time constraints have to be dealt with.

While automata-theoretic methods based on translating the specification to a finite automaton and constructing a winning strategy in the resulting omega-regular game could in principle be used, and do indeed provide the core algorithm, complexity withstands practical application of these methods. Therefore, a compositional extension is explored, which yields modular synthesis of multi-component controllers.

Based on this, a second extension is proposed for efficiently dealing with hard real-time constraints.