Conference paper
Implementation of the Signal Component Generator of a CALLUM 2 Transmitter Architecture in CMOS Technology
In
Proceedings of the 22nd Norchip Conference
—
2004, pp. 183,184,185,186
Abstract
This article presents an analog implementation of the signal component generator (SCG) of the CALLUM 2 linear transmitter architecture. The proposed SCG is suited for integration in a standard 0.35 μ m CMOS process, and has from simulations proven to be adequate when operating on an EDGE modulated baseband signal with a data rate of 270.833 ksymb/s.
The total current consumption of the SCG is 2.0mA from a 3.3 V supply. A variable gain amplifier (VGA) with common-mode (CM) control is presented, and the VGA is inserted in between the SCG and the voltage-controlled oscillator (VCO) to adjust the loop gain, which has strong influence on the stability and spectral performance of the linear transmitter architecture.
| Language: | English |
|---|---|
| Publisher: | IEEE |
| Year: | 2004 |
| Pages: | 183,184,185,186 |
| Proceedings: | 2004 IEEE 22nd NORCHIP Conference |
| ISBN: | 0780385101 and 9780780385108 |
| Types: | Conference paper |
| DOI: | 10.1109/NORCHP.2004.1423853 |
